The Memory Wall

by | Feb 26, 2026

The Chef Who Had to Wait

Imagine a world-class chef who can prepare 100 dishes per hour. The kitchen is state-of-the-art, the chef is lightning fast — and completely idle most of the day.

The problem? The pantry is slow. Ingredients arrive at a rate that supports only 30 dishes per hour. The chef spends most of the day standing around, waiting.

This, in essence, is the Memory Wall — one of the most important and least talked-about limits in modern computing.

Fig 1 — The Chef Analogy
PANTRY (Memory / RAM) 30 dishes/hr ingredient supply SLOW ROAD bottleneck CHEF (Processor / GPU) 100 dishes/hr capability ⏳ Waiting… 70% idle time not cooking THE MEMORY WALL GAP

What Is the Memory Wall?

Every computer has two key components: the Processor (CPU/GPU) — the brain that does calculations — and Memory (RAM) — the pantry that stores data the processor needs.

Over the past few decades, processor speeds have grown dramatically, roughly doubling every two years. But memory speed has grown much more slowly. The gap between the two has widened so far that processors now spend a large portion of their time simply waiting for data to arrive from memory.

Fig 2 — The Growing Speed Gap (1980–2024)
1000× 100× 10× 1980 1990 2000 2010 2024 GAP ~50× Processor speed Memory speed Relative speed
One-sentence version: The processor is so fast that it finishes its work and must sit idle, waiting for the next batch of data from memory — like our chef waiting for ingredients.

Why Can’t We Just Make Memory Faster?

This is where physics steps in. When engineers design computer chips, they face a fundamental geometric constraint: computing power grows with chip area, but memory connections can only grow with chip perimeter.

Think of it like a city. If you double the city’s area (more buildings = more computing), you don’t double the number of gates in the city wall (perimeter = memory connections). The wall grows much more slowly than the city.

Fig 3 — Area vs. Perimeter: The Root of the Problem
1× chip Compute: Memory: 4× chip Compute: Memory: 9× chip Compute: Memory: Compute units (area) Memory connections (perimeter)
Chip Area Computing Power Memory Speed Gap
2× gap
3× gap
100×100×10×10× gap

Every time computing power quadruples, memory speed only doubles. The gap keeps widening — by the laws of geometry, not by any engineering failure.

Why AI Makes This Far Worse

Modern AI systems don’t just encounter the memory wall — they crash into it at full speed. Consider what a large AI model actually requires:

Fig 4 — AI Models Are Memory-Hungry
1 GB Small model ~0.4 GB BERT 2018 ~350 GB GPT-3 2020 1 TB+ Modern LLM 2024 H/W limit exceeds memory bandwidth

A large model might need 10 TB/sec of data movement while the hardware can deliver only 1 TB/sec. That’s a 10× shortfall — one full “order of magnitude.” Some training workloads require 100× more data movement than available bandwidth.

This is why AI systems are expensive to run, consume enormous electricity, and require specialized hardware — it’s not just computation that’s costly, it’s the constant movement of data.

Amdahl’s Law: Why More GPUs Don’t Always Help

You might think: “Fine — let’s just add more GPUs!” But a classic principle called Amdahl’s Law explains exactly why this doesn’t fix the problem.

Amdahl’s Law (Simply Put)

The speed of a system is always limited by the part that cannot be sped up.

If 10% of a task must happen sequentially — one step at a time — then even with infinite processors handling the other 90%, you can never exceed a 10× speedup. You hit a hard ceiling.

Fig 5 — Amdahl’s Law & the Memory Bottleneck
Scenario A: Compute-bound Compute 80% Mem 20% → Adding GPUs helps a lot Scenario B: Memory-bound (AI workloads) 20% Memory waiting 80% → Adding GPUs barely helps Max Speedup from Adding GPUs: 5× speedup 80% 1.25× speedup 20% Even with 100 GPUs, a memory-bound task gives only 1.25× improvement

This is exactly what happens in many real AI workloads today. The memory wall turns data movement into the new “serial bottleneck” that Amdahl’s Law describes — except this time it’s a hardware limit, not a software one.

Fig 6 — The Three Physics Walls of Modern Computing
Power Wall Chips overheat if clocked faster Ended GHz race ~2004 Dennard Scaling Chips no longer get more efficient as they shrink Ended ~2006 Memory Wall Processors wait for data more than they compute Today’s key limit Together they explain why simply “adding more chips” no longer works.

What Is Being Done About It?

Engineers and researchers are attacking the memory wall from multiple directions simultaneously. Here are the most promising approaches:

Fig 7 — High Bandwidth Memory (HBM): Stacking Memory on the Processor
Traditional CPU/GPU long distance DRAM ~50 GB/s bandwidth With HBM GPU Processor HBM Layer 3 HBM Layer 2 HBM Layer 1 3,000+ GB/s bandwidth 60× improvement Used in NVIDIA H100, A100
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High Bandwidth Memory (HBM)

Memory stacked directly on the processor chip using 3D packaging. Eliminates the long data journey across a circuit board. NVIDIA’s H100 achieves over 3 TB/s — 60× faster than traditional RAM.

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Processing-in-Memory (PIM)

Instead of moving data to the processor, small processors are built directly into the memory chip. The data never has to travel at all. Early commercial products are beginning to appear.

Smarter Caching

Small ultra-fast memory banks (caches) built onto the processor chip store frequently used data. Modern AI chips use much larger caches and smarter prediction algorithms to reduce idle waiting time.

✂️

Sparsity & Compression

If a model doesn’t need all its parameters for every task, why load them all? Pruning removes unnecessary parameters; quantisation uses lower-precision numbers — dramatically reducing data movement.

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Optical Interconnects

Transmitting data using light instead of electrical signals. Light travels faster and doesn’t generate heat, potentially solving both the memory wall and power wall simultaneously.

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Near-Memory Architectures

Chip designs like Cerebras and Graphcore use massive chips with enormous on-chip memory, so data never leaves the chip. Trades conventional processor flexibility for raw memory bandwidth.

Why Everyone Should Care

Fig 8 — Real-World Consequences of the Memory Wall
Energy Data centres consume more power 💸 AI Cost Running AI models is expensive 🌍 Climate AI’s carbon footprint grows 🔬 Innovation Limits what AI can become

The memory wall has consequences that reach far beyond chip design labs:

Energy & climate: A significant portion of data centre electricity is spent moving data, not computing. Solving the memory wall could dramatically reduce AI’s carbon footprint — a problem that grows with every new model.

AI accessibility: The expense of running large AI models is partly a memory problem. Better memory architecture could make AI faster, cheaper, and accessible to smaller organisations and developing economies.

The end of “just build faster chips”: For decades, computers doubled in power every two years (Moore’s Law). The memory wall — alongside the power wall — is one of the key reasons that era has ended. Simply building faster processors no longer automatically produces faster systems.


The Big Takeaway

We have built processors of extraordinary speed — but we haven’t built equally fast highways to deliver data to them. The processor sits at the end of a slow road, waiting. This is the memory wall. And it explains, more than almost any other concept, why adding more GPUs doesn’t always make AI faster, why data centres consume enormous power, and why the next frontier in computing is not just about making processors faster — but about rethinking how data moves.

The chef is brilliant. The kitchen is magnificent. We just need a better pantry — and a much faster delivery system.

Disclaimer : Made with Claude AI for graphics.

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